Packet Transfer Enable Register 0 (Ptter0) - Renesas H8S/2158 User Manual

Section 18 Universal Serial Bus Interface (USB)
18.3.6

Packet Transfer Enable Register 0 (PTTER0)

PTTER0 controls the FIFO valid size register used in the host input transfer of the USB function
core.
In the USB protocol, communication is performed using packets. The minimum unit of data
transfer is a transaction. A transaction is comprised of a token packet, a data packet, and a
handshake packet.
In host input transfer, the USB function core receives an IN token (packet). On receiving the IN
token, the USB core must send a data packet when it is not stalled or a NAK handshake if no data
exists.
If an EPTE bit is set to 1 after the slave CPU has written the data that is to be transferred to the
host in the FIFO, the contents of FVSR is modified. This enables the transmission of data written
in FIFO. By controlling the data transmission using an EPTE bit, erroneous data transmission
during data write from slave CPU to FIFO can be prevented effectively.
The FIFO used for endpoint 4 is assigned to the on-chip RAM area controlled by the RFU. If the
EP4TE bit is set to 1, data transmission is initiated by an IN token and then data in the FIFO is
sent to a buffer in the USB interface (pre-read).
To transfer a data packet of 0 bytes to the host, set the corresponding EPTE bit to 1 in the RAM-
FIFO empty state.
Rev. 3.00 Jan 25, 2006 page 564 of 872
REJ09B0286-0300