Table 2.5 Logic Operations Instructions; Table 2.6 Shift Instructions - Renesas H8S/2158 User Manual

Section 2 CPU
Table 2.5 Logic Operations Instructions
Instruction Size *
AND B/W/L
OR B/W/L
XOR B/W/L
NOT B/W/L
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Table 2.6 Shift Instructions
Instruction Size *
SHAL B/W/L
SHAR
SHLL B/W/L
SHLR
ROTL B/W/L
ROTR
ROTXL B/W/L
ROTXR
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 3.00 Jan 25, 2006 page 38 of 872
REJ09B0286-0300
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
∼ Rd → Rd
Takes the one's complement (logical complement) of data in a general
register.
Function
Rd (shift) → Rd
Performs an arithmetic shift on data in a general register. 1-bit or 2 bit
shift is possible.
Rd (shift) → Rd
Performs a logical shift on data in a general register. 1-bit or 2 bit shift is
possible.
Rd (rotate) → Rd
Rotates data in a general register. 1-bit or 2 bit rotation is possible.
Rd (rotate) → Rd
Rotates data including the carry flag in a general register. 1-bit or 2 bit
rotation is possible.