Table 13.2 Clock Input To Tcnt And Count Condition - Renesas H8S/2158 User Manual

Section 13 8-Bit Timer (TMR)

Table 13.2 Clock Input to TCNT and Count Condition

TCR
Channel
CKS2 CKS1
TMR_0 0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
TMR_1 0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
TMR_Y 0 0
0 0
0 1
0 1
1 0
TMR_X 0 0
0 0
0 1
0 1
1 0
Common 1 0
1 1
1 1
Legend: : Don't care
Note: * If the TMR_0 clock input is set as the TCNT_1 overflow signal and the TMR_1 clock input is set as
the TCNT_0 compare-match signal simultaneously, a count-up clock cannot be generated.
Simultaneous setting of this condition should therefore be avoided.
Rev. 3.00 Jan 25, 2006 page 322 of 872
REJ09B0286-0300
STCR
CKS0 ICKS1 ICKS0
0 — —
1 — 0
1 — 1
0 — 0
0 — 1
1 — 0
1 — 1
0 — —
0 — —
1 0 —
1 1 —
0 0 —
0 1 —
1 0 —
1 1 —
0 — —
0 — —
1 — —
0 — —
1 — —
0 — —
0 — —
1 — —
0 — —
1 — —
0 — —
1 — —
0 — —
1 — —
Description
Disables clock input
Increments at falling edge of internal clock φ/8
Increments at falling edge of internal clock φ/2
Increments at falling edge of internal clock φ/64
Increments at falling edge of internal clock φ/32
Increments at falling edge of internal clock φ/1024
Increments at falling edge of internal clock φ/256
Increments at overflow signal from TCNT_1 *
Disables clock input
Increments at falling edge of internal clock φ/8
Increments at falling edge of internal clock φ/2
Increments at falling edge of internal clock φ/64
Increments at falling edge of internal clock φ/128
Increments at falling edge of internal clock φ/1024
Increments at falling edge of internal clock φ/2048
Increments at compare-match A from TCNT_0 *
Disables clock input
Increments at falling edge of internal clock φ/4
Increments at falling edge of internal clock φ/256
Increments at falling edge of internal clock φ/2048
Setting prohibited
Disables clock input
Increments at falling edge of internal clock φ
Increments at falling edge of internal clock φ/2
Increments at falling edge of internal clock φ/4
Setting prohibited
Increments at rising edge of external clock
Increments at falling edge of external clock
Increments at both rising and falling edges of
external clock.