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11.3.1
PWM D/A Counter H, L (DACNTH, DACNTL)
DACNT is a 14-bit readable/writable up-counter. The input clock is selected by the clock select bit
(CKS) in DACR. DACNT functions as the time base for both PWM (D/A) channels. When a
channel operates with 14-bit precision, it uses all DACNT bits. When a channel operates with 12-
bit precision, it uses the lower 12 bits and ignores the upper two bits. DACNT cannot be accessed
in 8-bit units. DACNT should always be accessed in 16-bit units. For details, see section 11.4, Bus
Master Interface.
Bit (CPU)
:
15
14
Bit (counter)
:
7
6
DACNTH
Bit
Bit Name
Initial Value
7
UC7
All 0
to
to
0
UC0
DACNTL
Bit
Bit Name
Initial Value
7
UC8
All 0
to
to
2
UC13
1
—
1
0
REGS
1
DACNTH
13
12
11
10
5
4
3
2
R/W
Description
R/W
Upper Up-Counter
R/W
Description
R/W
Lower Up-Counter
R
Reserved
This bit is always read as 1 and cannot be modified.
R/W
Register Select
DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies
which registers can be accessed.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
Section 11 14-Bit PWM Timer (PWMX)
9
8
7
6
5
1
0
8
9
10
Rev. 3.00 Jan 25, 2006 page 275 of 872
DACNTL
4
3
2
1
11
12
13
REGS
REJ09B0286-0300
0
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