Ram-Fifo Location; Ram-Fifo Pointer; Ram-Fifo Manipulation And Rfu Bus Cycles - Renesas H8S/2158 User Manual

Section 8 RAM-FIFO Unit (RFU)
8.4

RAM-FIFO Location

The RAM-FIFO should be allocated at the addresses H'(FF)E080 to H'(FF)EFFF and H'FF0800 to
H'FF1FFF in on-chip RAM. Do not allocate the RAM-FIFO at the external address space.
8.5

RAM-FIFO Pointer

The RAM-FIFO specifies the start address by BAR, and the size by the BUD2 to BUD0 bits in
DTCRA. BAR and the BUD2 to BUD0 bits in DTCRA should be set so that the RAM-FIFO areas
of all pointer sets are stored in the on-chip RAM area, and the RAM-FIFO areas do not overlap
inter-pointer sets.
The RAM-FIFO can be accessed when the value of the sum of the contents of BAR and either the
contents of RAR, WAR, TMP, is output to the address bus.
8.6

RAM-FIFO Manipulation and RFU Bus Cycles

Table 8.4 summarizes the requests from the peripheral modules to the RFU and manipulations of
the RFU bus cycle and pointer.
The RFU returns an acknowledge signal for a request from the peripheral modules to clear the
request. All RFU bus cycles are executed in two states. In the RFU bus cycle, data transfer is
executed or the error status is notified in addition to clearing a request and the RFU pointer is
manipulated simultaneously. In data transfer in the RFU bus cycle, the RAM address is output to
the address bus, the ID of the peripheral module is specified, and data transfer from RAM to the
peripheral module or from peripheral module to RAM is executed in one bus cycle,
simultaneously. An RFU bus cycle other than the read/write cycle is two states.
There are four types of requests from the peripheral modules: Data transfer, pointer mark
(RAR/WAR → TMP), pointer reload (TMP → RAR/WAR), and pointer reset (0 → RAR, WAR,
TMP).
When data transfer is executed, either RAR or WAR is added for the number of transfer bytes,
according to the settings of the transfer direction and the byte/word transfer. As one TMP is
provided in a pointer set, TMP is used as either the read temporary pointer or write temporary
pointer.
If the added contents exceed the FIFO size specified by bits BUD2 to BUD0 in DTCRA, the
pointer is set to a value from which the FIFO size is decremented (remainder of the FIFO size).
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