Renesas H8S/2158 User Manual page 622

Section 18 Universal Serial Bus Interface (USB)
USBIFR0
Bit Bit Name Initial Value R/W
7 TS 0
6 TF 0
5 UDTRF 0
Rev. 3.00 Jan 25, 2006 page 568 of 872
REJ09B0286-0300
Description
R Transfer Normal Completion Interrupt Status
Indicates that data transfer for an USB core endpoint has
been completed normally.
If the TSE bit in USBIER0 is set to 1, an USBID interrupt
is requested to the slave CPU. In this case, if an interrupt
source whose TS bit is set to 1 is specified to request an
USBIB or USBIC interrupt, the USBIB or USBIC interrupt
is processed prior to the USBID interrupt according to
the interrupt priority specified in the slave CPU interrupt
controller.
0: All bits in TSFR0 are cleared to 0.
1: At least one bit in TSFR0 is set to 1.
R Transfer Abnormal Completion Interrupt Status
Indicates that data transfer for an USB core endpoint has
been completed abnormally.
If the TFE bit in USBIER0 is set to 1, an USBID interrupt
is requested to the slave CPU. In this case, if an interrupt
source whose TF bit is set to 1 is specified to request an
USBIB or USBIC interrupt, the USBIB or USBIC interrupt
is processed prior to the USBID interrupt according to
the interrupt priority specified in the slave CPU interrupt
controller.
0: All bits in TFFR0 are cleared to 0.
1: At least one bit in TFFR0 is set to 1.
R RFU/FIFO Read Request Interrupt Status
Indicates that the host output transfer (out transaction)
has been completed normally and that the RAM-FIFO is
full and the receive buffer contains data.
If the UDTRE bit in USBIER0 is set to 1, an USBID
interrupt is requested to the slave CPU.
0: All bits in UDTRFR are cleared to 0.
1: At least one bit in UDTRFR is set to 1.