Figure 17.18 Sample Flowchart For Master Transmit Mode - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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2
Section 17 I
C Bus Interface (IIC)
No
No
No
No
No

Figure 17.18 Sample Flowchart for Master Transmit Mode

Rev. 3.00 Jan 25, 2006 page 536 of 872
REJ09B0286-0300
Start
Initialize
Read BBSY in ICCR
BBSY = 0?
Yes
Set MST = 1 and
TRS = 1 in ICCR
Set BBSY =1 and
SCP = 0 in ICCR
Read IRIC in ICCR
IRIC = 1?
Yes
Write transmit data in ICDR
Clear IRIC in ICCR
Read IRIC in ICCR
IRIC = 1?
Yes
Read ACKB in ICSR
No
ACKB = 0?
Yes
No
Transmit mode?
Yes
Write transmit data in ICDR
Clear IRIC in ICCR
Read IRIC in ICCR
IRIC = 1?
Yes
Read ACKB in ICSR
End of transmission?
or ACKB = 1?
Yes
Clear IRIC in ICCR
Set BBSY = 0 and
SCP = 0 in ICCR
End
[1] Initialization
[2] Test the status of the SCL and SDA lines.
[3] Select master transmit mode.
[4] Start condition issuance
[5] Wait for a start condition
[6] Set transmit data for the first byte
(slave address + R/W).
(After writing to ICDR, clear IRIC
continuously.)
[7] Wait for 1 byte to be transmitted.
[8] Test the acknowledge bit
transferred from the slave device.
Master receive mode
[9] Set transmit data for the second and
subsequent bytes.
(After writing to ICDR, clear IRIC
immediately.)
[10] Wait for 1 byte to be transmitted.
[11] Test for end of tranfer
[12] Stop condition issuance

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