Renesas H8S/2158 User Manual page 25

9.9.1 Port 9 Data Direction Register (P9DDR)............................................................. 250
9.9.2 Port 9 Data Register (P9DR)................................................................................ 251
9.9.3 Pin Functions ....................................................................................................... 251
9.10 Port A................................................................................................................................ 254
9.10.1 Port A Data Direction Register (PADDR) ........................................................... 254
9.10.2 Port A Output Data Register (PAODR) ............................................................... 254
9.10.3 Port A Input Data Register (PAPIN).................................................................... 255
9.10.4 Pin Functions ....................................................................................................... 255
9.10.5 Input Pull-Up MOS.............................................................................................. 257
9.11 Change of Peripheral Function Pins.................................................................................. 258
9.11.1 IRQ Sense Port Select Register 16 (ISSR16), IRQ Sense Port Select
Register (ISSR) .................................................................................................... 258
9.11.2 Port Control Register 0 (PTCNT0) ...................................................................... 260
Section 10 8-Bit PWM Timer (PWM)
10.1 Features ............................................................................................................................. 261
10.2 Input/Output Pins .............................................................................................................. 263
10.3 Register Descriptions ........................................................................................................ 263
10.3.1 PWM Register Select (PWSL)............................................................................. 264
10.3.2 PWM Data Registers (PWDR0 to PWDR15) ...................................................... 266
10.3.3 PWM Data Polarity Registers A and B (PWDPRA and PWDPRB).................... 266
10.3.4 PWM Output Enable Registers A and B (PWOERA and PWOERB) ................. 267
10.3.5 Peripheral Clock Select Register (PCSR) ............................................................ 269
10.4 Operation........................................................................................................................... 270
Section 11 14-Bit PWM Timer (PWMX)
11.1 Features ............................................................................................................................. 273
11.2 Input/Output Pins .............................................................................................................. 274
11.3 Register Descriptions ........................................................................................................ 274
11.3.1 PWM D/A Counter H, L (DACNTH, DACNTL)................................................ 275
11.3.2 PWM (D/A) Data Registers A and B (DADRA and DADRB)............................ 276
11.3.3 PWM (D/A) Control Register (DACR) ............................................................... 277
11.3.4 Peripheral Clock Select Register (PCSR) ............................................................ 279
11.4 Bus Master Interface ......................................................................................................... 280
11.5 Operation........................................................................................................................... 281
Section 12 16-Bit Free-Running Timer (FRT)
12.1 Features ............................................................................................................................. 287
12.2 Input/Output Pins .............................................................................................................. 289
12.3 Register Descriptions ........................................................................................................ 289
12.3.1 Free-Running Counter (FRC) .............................................................................. 290
.......................................................................... 261
..................................................................... 273
............................................................ 287
Rev. 3.00 Jan 25, 2006 page xxiii of lii