Input/Output Pins; Register Descriptions; Table 10.1 Pin Configuration - Renesas H8S/2158 User Manual

10.2

Input/Output Pins

Table 10.1 shows the PWM output pins.

Table 10.1 Pin Configuration

Name
PWM output 15 to 0
10.3

Register Descriptions

The PWM has the following registers. To access PCSR, the FLSHE bit in the serial timer control
register (STCR) must be cleared to 0. For details on the serial timer control register (STCR), see
section 3.2.3, Serial Timer Control Register (STCR).
• PWM register select (PWSL)
• PWM data registers 0 to 15 (PWDR0 to PWDR15)
• PWM data polarity register A (PWDPRA)
• PWM data polarity register B (PWDPRB)
• PWM output enable register A (PWOERA)
• PWM output enable register B (PWOERB)
• Peripheral clock select register (PCSR)
Abbreviation I/O
PW15 to PW0 Output
Section 10 8-Bit PWM Timer (PWM)
Function
PWM timer pulse output 15 to 0
Rev. 3.00 Jan 25, 2006 page 263 of 872
REJ09B0286-0300