Figure 18.3 Operation On Receiving A Setup Token (When Decode By The Slave Cpu Is Required And When Seticnt = 0) - Renesas H8S/2158 User Manual

USB Host
Send a SETUP
token packet
Send an OUT data
packet (8 bytes)
Receive an ACK
handshake packet
Notes: 1. Set the EP0OTC bit of USECSR0 to 1, initialize FVSR0I and FVSR0O, clear the EP0ITS and EP0OTS bits of TSFR0 to 0,
clear the EP0ITF and EP0OTF bits of TFFR to 0, and clear the EP0STL bit of EPSTLR0 to 0.
2. Since a USBIA interrupt is only assigned to a SETUP interrupt, interrupt source determination process is not required.
Figure 18.3 Operation on Receiving a SETUP Token (When Decode by the Slave CPU Is
Section 18 Universal Serial Bus Interface (USB)
USB Function Core
Receive a SETUP
token packet
Receive an OUT data
packet (8 bytes)
Command data decode
Check if decode by
the slave CPU is
required or not
Send ACK
to the host CPU
Send ACK
to the slave CPU
Required and When SETICNT = 0)
Core Interface
Automatically set
each flag * 1
Request an USBIA
interrupt (SETUP)
Write data to EP0O
FIFO
Modify FVSR0O
Clear EP0OTC bit of
USBCSR0 to 0
Request an USBID
interrupt (EP0OTF)
Modify FVSR0O
Rev. 3.00 Jan 25, 2006 page 607 of 872
Slave CPU
Initiate the USBIA
interrupt processing
Read USBIFR0 * 2
Store the information
indicating that the decode
must be performed by
the EP0OTS interrupt to
be generated in
the following sequence
in user memory
Clear the SETUPF bit
of USBIFR0 to 0
Complete the USBIA
interrupt processing
Initiate the USBID
interrupt processing
Read USBIFR0 and
check the TS interrupt
occurrence
Read TSFR0 and check
the EP0OTS interrupt
occurrence
Check if the command
decode by the slave
CPU is required by
the stored information
Read FVSR0O and
check if the EP0 FIFO
contains 8-byte data
Read EPDR0O
Check the instruction
by data decode
If the instruction is
Control-OUT, set
the EP0OTC bit of
USBCSR0 to 1 (write 1
to EP0OTC after
EP0OTC = 1 was read)
Clear the EP0OTS bit
of TSFR0 to 0
Complete the USBID
interrupt processing
REJ09B0286-0300