Iic Operation Reservation Adapter Data Register (Icdrx); Figure 17.3 State Transitions Of Tdre, Sdrf, And Rdrf Bits - Renesas H8S/2158 User Manual

TDRE = 0
SDRF = 0
(Rise of 9th clock in first frame in master mode)

Figure 17.3 State Transitions of TDRE, SDRF, and RDRF Bits

17.3.11 IIC Operation Reservation Adapter Data Register (ICDRX)

ICDRX is an 8-bit register identical to ICDR. When this register is accessed for read, the contents
in the receive buffer (ICDRR) are read out; and when this register is accessed for write, the write
data is written to the transmit buffer (ICDRT). However, the IIC module operates in the way
defined by the operation reservation adapter when this register is read from or written to.
When the ICXE bit in ICCRX is set to 1, accesses to ICDR are invalid. The initial value of
ICDRX is undefined.
Start condition detected
Stop condition detected
Rise of 9th clock
TDRE = 1
SDRF = 1
Fall of 1st clock
(a) Transmit mode
Start condition detected
Fall of 8th clock
Fall of 8th clock
Section 17 I
Rise of 9th clock in first frame
TDRE = 1
SDRF = 0
Write to ICDRX
Fall of 1st clock
Write to ICDRX
Rise of 9th clock
TDRE = 0
SDRF = 1
SDRE = 0
Stop condition detected
RDRF = 0
Read from ICDRX
SDRE = 0
Stop condition detected
RDRF = 1
Read from ICDRX
SDRE = 1
RDRF = 1
(b) Receive mode
Rev. 3.00 Jan 25, 2006 page 507 of 872
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C Bus Interface (IIC)
TDRE = 0
SDRF = 1
REJ09B0286-0300