Data Transfer Control Register B (Dtcrb) - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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8.2.11

Data Transfer Control Register B (DTCRB)

DTCRB is a register provided in each pointer set that controls the operation of the interrupt flag in
each pointer set and the data transfer between pointers.
Bit
Bit Name
7
BOVF_RE
6
BOVF_WE
5
FULLE
4
EMPTYE
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Section 8 RAM-FIFO Unit (RFU)
Description
Boundary Overflow Enable (at reading)
Selects whether to reflect RAR boundary
overflow to the BOVF_R flag in DTSTRC.
0: Boundary overflow (at reading) is not
reflected to the BOVF_R flag
1: Boundary overflow (at reading) is reflected to
the BOVF_R flag
Boundary Overflow Enable (at writing)
Selects whether to reflect WAR boundary
overflow to the BOVF_W flag in DTSTRC.
0: Boundary overflow (at writing) is not reflected
to the BOVF_W flag
1: Boundary overflow (at writing) is reflected to
the BOVF_W flag
FIFO Full Enable
Selects whether to reflect detection of FIFO full
(generation of WAR = RAR or TMP = WAR
(when the read temporary pointer is selected)
according to the write bus cycle) to the FULL
flag in DTSTRC.
0: FIFO full detection is not reflected to the
FULL flag
1: FIFO full detection is reflected to the FULL
flag
FIFO Empty Enable
Selects whether to reflect detection of FIFO
empty (generation of RAR = WAR or TMP =
RAR (when the write temporary pointer is
selected) according to the read bus cycle) to
the EMPTY flag in DTSTRC.
0: FIFO empty detection is not reflected to the
EMPTY flag
1: FIFO empty detection is reflected to the
EMPTY flag
Rev. 3.00 Jan 25, 2006 page 175 of 872
REJ09B0286-0300

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