Renesas H8S/2158 User Manual page 29

16-bit single-chip microcomputer h8s family/h8s/2100 series
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16.4.5 SCI Initialization (Asynchronous Mode) ............................................................. 424
16.4.6 Serial Data Transmission (Asynchronous Mode) ................................................ 425
16.4.7 Serial Data Reception (Asynchronous Mode)...................................................... 427
16.5 Multiprocessor Communication Function......................................................................... 431
16.5.1 Multiprocessor Serial Data Transmission ............................................................ 432
16.5.2 Multiprocessor Serial Data Reception ................................................................. 433
16.6 Operation in Clocked Synchronous Mode ........................................................................ 437
16.6.1 Clock.................................................................................................................... 437
16.6.2 SCI Initialization (Synchronous).......................................................................... 437
16.6.3 Serial Data Transmission (Clocked Synchronous Mode) .................................... 438
16.6.4 Serial Data Reception (Clocked Synchronous Mode).......................................... 441
(Clocked Synchronous Mode) ............................................................................. 443
16.6.6 SCI Selection in Serial Enhanced Mode .............................................................. 443
16.7 Smart Card Interface Description...................................................................................... 445
16.7.1 Sample Connection .............................................................................................. 445
16.7.2 Data Format (Except in Block Transfer Mode) ................................................... 446
16.7.3 Block Transfer Mode ........................................................................................... 447
16.7.4 Receive Data Sampling Timing and Reception Margin....................................... 447
16.7.5 Initialization ......................................................................................................... 449
16.7.7 Serial Data Reception (Except in Block Transfer Mode)..................................... 453
16.7.8 Clock Output Control........................................................................................... 454
16.8 IrDA Operation ................................................................................................................. 456
16.9 Interrupt Sources ............................................................................................................... 459
16.9.2 Interrupts in Smart Card Interface Mode ............................................................. 460
16.10 Usage Notes ...................................................................................................................... 461
16.10.1 Module Stop Mode Setting .................................................................................. 461
16.10.2 Break Detection and Processing........................................................................... 461
16.10.3 Mark State and Break Detection .......................................................................... 462
(Clocked Synchronous Mode Only)..................................................................... 462
16.10.5 Relation between Writing to TDR and TDRE Flag ............................................. 462
16.10.6 Restrictions on Using DTC or RFU ..................................................................... 462
16.10.7 SCI Operations during Mode Transitions ............................................................ 463
16.10.8 Notes on Switching from SCK Pins to Port Pins ................................................. 466
16.11 CRC Operation Circuit...................................................................................................... 467
16.11.1 Features................................................................................................................ 467
16.11.2 Register Descriptions ........................................................................................... 467
16.11.3 CRC Operation Circuit Operation........................................................................ 469
Rev. 3.00 Jan 25, 2006 page xxvii of lii

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