Figure 14.6 2Fh Modification Timing Chart; Table 14.7 Examples Of Tcr, Tcsr, Tocr, And Ocrdm Settings - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Section 14 Timer Connection

Table 14.7 Examples of TCR, TCSR, TOCR, and OCRDM Settings

Register
Bit
TCR in FRT
4
1, 0
TCSR in FRT
0
TOCR in FRT
7
OCRDM in FRT
7 to 0
IHI signal
(without 2fH
modification)
IHI signal
(with 2fH
modification)
Mask interval
ICRD + OCRDM × 2
ICRD + OCRDM
FRC
ICRD
Rev. 3.00 Jan 25, 2006 page 364 of 872
REJ09B0286-0300
Abbreviation
IEDGD
CKS1, CKS0
CCLRA
ICRDMS
OCRDM7 to
OCRDM0

Figure 14.6 2fH Modification Timing Chart

Contents
Description
1
FRC value is transferred to ICRD on
the rising edge of input capture input
D (IHI signal)
01
FRC is incremented on internal
clock: φ/8
0
FRC clearing is disabled
1
ICRD is set to the operating mode in
which OCRDM is used
H'01 to H'FF Specifies the period during which
ICRD operation is masked

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