Endpoint Direction Register 0 (Epdir0) - Renesas H8S/2158 User Manual

18.3.5

Endpoint Direction Register 0 (EPDIR0)

EPDIR0 controls the direction of data transfer for endpoints other than endpoint 0 of the USB
function core. In this LSI, EP1, EP3 and EP4 must be specified as host input transfers, EP5 as a
host output transfer, and EP2 as either a host input transfer or host output transfer.
EPDIR0 is initialized to H'3C by a system reset or function software reset (see section 18.3.16,
USB Control Registers 0 and 1 (USBCR0, USBCR1)).
Bit Bit Name Initial Value R/W
7 — 0
6 EP5DIR 0
5 EP4DIR 1
4 EP3DIR 1
3 EP2DIR 1
2 EP1DIR 1
1, 0 — All 0
Section 18 Universal Serial Bus Interface (USB)
Description
R Reserved
This bit is always read as 0 and cannot be modified.
R/W Endpoint 5 Data Direction Control Flag
Controls the data transfer direction of endpoint 5.
0: Endpoint 5 is specified as host output transfer
1: Setting prohibited
R/W Endpoint 4 Data Direction Control Flag
Controls the data transfer direction of endpoint 4.
0: Setting prohibited
1: Endpoint 4 is specified as host input transfer
R/W Endpoint 3 Data Direction Control Flag
Controls the data transfer direction of endpoint 3.
0: Setting prohibited
1: Endpoint 3 is specified as host input transfer
R/W Endpoint 2 Data Direction Control Flag
Controls the data transfer direction of endpoint 2.
0: Endpoint 2 is specified as host output transfer
1: Endpoint 2 is specified as host input transfer
R/W Endpoint 1 Data Direction Control Flag
Controls the data transfer direction of endpoint 1.
0: Setting prohibited
1: Endpoint 1 is specified as host input transfer
R Reserved
These bits are always read as 0 and cannot be
modified.
Rev. 3.00 Jan 25, 2006 page 563 of 872
REJ09B0286-0300