Input Capture Registers R And F (Ticrr And Ticrf); Timer Input Select Register (Tisr) - Renesas H8S/2158 User Manual

13.3.8

Input Capture Registers R and F (TICRR and TICRF)

TICRR and TICRF are 8-bit read-only registers. The contents of TCNT are transferred at the
rising edge and falling edge of the external reset input in that order, when the ICST bit in TCONRI
of the timer connection is set to 1. The ICST bit is cleared to 0 when one capture operation ends.
TICRR and TICRF are initialized to H'00. The TICRR and TICRF functions are used for timer
connection. For details, see section 14, Timer Connection.
13.3.9

Timer Input Select Register (TISR)

TISR selects a signal source of external clock/reset input for the counter.
Bit Bit Name Initial Value R/W
7 — All 1
to
1
0 IS 0
Description
R/(W) Reserved
The initial value should not be changed.
R/W Input Select
Selects an internal synchronization signal (IVG signal) or
timer clock/reset input pin (TMIY or ExTMIY) as the
signal source of external clock/reset input for the TMRY
counter.
0: IVG signal is selected
1: TMIY or ExTMIY (TMCIY/TMRIY) is selected
Section 13 8-Bit Timer (TMR)
Rev. 3.00 Jan 25, 2006 page 329 of 872
REJ09B0286-0300