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12.2
Input/Output Pins
Table 12.1 lists the FRT input and output pins.
Table 12.1 Pin Configuration
Name
Counter clock input pin
Output compare A output pin
Output compare B output pin
Input capture A input pin
Input capture B input pin
Input capture C input pin
Input capture D input pin
12.3
Register Descriptions
The FRT has the following registers.
• Free-running counter (FRC)
• Output compare register A (OCRA)
• Output compare register B (OCRB)
• Input capture register A (ICRA)
• Input capture register B (ICRB)
• Input capture register C (ICRC)
• Input capture register D (ICRD)
• Output compare register AR (OCRAR)
• Output compare register AF (OCRAF)
• Output compare register DM (OCRDM)
• Timer interrupt enable register (TIER)
• Timer control/status register (TCSR)
• Timer control register (TCR)
• Timer output compare control register (TOCR)
Note: OCRA and OCRB share the same address. Register selection is controlled by the OCRS
bit in TOCR. ICRA, ICRB, and ICRC share the same addresses with OCRAR, OCRAF,
and OCRDM. Register selection is controlled by the ICRS bit in TOCR.
Section 12 16-Bit Free-Running Timer (FRT)
Abbreviation
I/O
FTCI
Input
FTOA
Output
FTOB
Output
FTIA
Input
FTIB
Input
FTIC
Input
FTID
Input
Function
FRC counter clock input
Output compare A output
Output compare B output
Input capture A input
Input capture B input
Input capture C input
Input capture D input
Rev. 3.00 Jan 25, 2006 page 289 of 872
REJ09B0286-0300
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