Usb Mode Control Register (Usbmdcr) - Renesas H8S/2158 User Manual

Section 18 Universal Serial Bus Interface (USB)

18.3.21 USB Mode Control Register (USBMDCR)

USBMDCR controls SETUP transaction operations and stall cancellation procedures.
USBMDCR is initialized to H'00 by a system reset or function software reset (see section 18.3.16,
USB Control Registers 0 and 1 (USBCR0, USBCR1)).
Bit Bit Name Initial Value R/W
7 to — All 0
2
1 SCME 0
0 SETICNT 0
Rev. 3.00 Jan 25, 2006 page 600 of 872
REJ09B0286-0300
Description
R Reserved
These bits are always read as 0 and cannot be modified.
R/W Stall Cancellation Mode Enable
Specifies the auto-clear function of the EPSTL bit in
EPSTLR0.
0: Does not specify the auto-clear function of the EPSTL
bit
1: Specifies the auto-clear function of the EPSTL bit
corresponding to the endpoint that responds to a
STALL handshaking
R/W Setup Interrupt Control
Specifies the FIFO handling methods in SETUP
transaction and interrupt control.
0: FIFO is used for EP0O and EP0I, and a SETUP
transaction uses EP0O. An USBIA interrupt is used
and its priority is specified as the highest.
1: FIFO is used for EP0O, EP0I, and EP0S, and a
SETUP transaction uses EP0S. An USBIA interrupt is
used and its priority is specified as the lowest.