Figure 29.11 Basic Bus Timing/3-State Access With One Wait State - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Section 29 Electrical Characteristics
φ
A17 to A0, IOS * ,
CS256, CPCS1
AS *
RD
(Read)
D15 to D0
(Read)
HWR, LWR
(Write)
D15 to D0
(Write)
WAIT
Note: * AS is multiplexed with IOS. Either the AS or IOS function can be selected by the IOSE bit of SYSCR.

Figure 29.11 Basic Bus Timing/3-State Access with One Wait State

Rev. 3.00 Jan 25, 2006 page 842 of 872
REJ09B0286-0300
T 1
T 2
t
t
WTS
WTH
T w
T 3
t
t
WTS
WTH

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