Renesas H8S/2158 User Manual page 557

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Bit
Bit Name
Initial Value
5
STREQ
0
4
SRREQ
0
3
MASX
0
R/W
Description
R/(W) *
1
Slave Mode Transmit Data Write Request Interrupt Flag:
0: No transmit data write request is generated in slave
mode
1: A transmit data write request is generated and an
interrupt is requested in slave mode
[Clearing conditions]
When ICDRX is written to
When ICCMD is written to
When 0 is written to STREQ after reading STREQ = 1
[Setting condition]
When data transmission is completed in slave mode
R/(W) *
1
Slave Mode Receive Data Read Request Interrupt Flag
0: No receive data read request is generated in slave
mode
1: A receive data read request is generated and an
interrupt is requested in slave mode
[Clearing conditions]
When ICDRX is written to
When ICCMD is written to
When 0 is written to SRREQ after reading SRREQ =
1
[Setting condition]
When data reception is completed in slave mode
R
Master Mode Address Select X
0: DTC cannot be activated
Address disagrees in slave mode or AAS and ADZ
addresses agree
1: DTC can be activated
In master mode, or AASX address agrees in slave
mode
2
Section 17 I
C Bus Interface (IIC)
Rev. 3.00 Jan 25, 2006 page 503 of 872
REJ09B0286-0300

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