A/D Control Register (Adcr) - Renesas H8S/2158 User Manual

Section 22 A/D Converter
Bit Bit Name Initial Value
2 CH2 0
1 CH1 0
0 CH0 0
Note: * Only 0 can be written for clearing the flag.
22.3.3

A/D Control Register (ADCR)

ADCR enables A/D conversion started by an external trigger signal.
Bit Bit Name Initial Value
7 TRGS1 0
6 TRGS0 0
5 — All 1
to
0
Rev. 3.00 Jan 25, 2006 page 702 of 872
REJ09B0286-0300
R/W Description
R/W Channel Select 2 to 0
R/W Select analog input channels.
R/W
When SCAN = 0
000: CIN0 to CIN7
001: Setting prohibited
010: AN2
011: AN3
100: AN4
101: AN5
110: AN6
111: AN7
R/W Description
R/W Timer Trigger Select 1 and 0
R/W Enable the start of A/D conversion by a trigger signal.
Only set bits TRGS1 and TRGS0 while A/D
conversion is stopped (ADST = 0).
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by external trigger is disabled
10: A/D conversion start by conversion trigger from
TMR
11: A/D conversion start by ADTRG pin
R Reserved
These bits are always read as 1 and cannot be
modified.
When SCAN = 1
000: CIN0 to CIN7
001: Setting prohibited
010: Setting prohibited
011: Setting prohibited
100: AN4
101: AN4 and AN5
110: AN4 to AN6
111: AN4 to AN7