Table 18.7 Endpoint Information - Renesas H8S/2158 User Manual

Section 18 Universal Serial Bus Interface (USB)
(c) EPINFO: Endpoint information
The USB function core of this LSI can support isochronous transfer. However, due to the CPU
interface specifications, the USB function core of this LSI handles only control transfer,
interrupt transfer, and bulk transfer.
At each USB function core initialization, the firmware writes endpoint information (EPINFO)
such as the number of endpoints and their corresponding transfer type, maximum packet size
(bytes) to the USB function core. This LSI prepares three alternatives that can be written in
EPINFO. Table 18.7 shows the endpoint information (EPINFO) that can be written in the USB
function core. A total of 65 bytes (A1, A2, ..., A5, B1, B2, ..., M4, M5) must be written to
EDPR0I in this order.

Table 18.7 Endpoint Information

1
A H'00
B H'14
C H'24
D H'14
E H'24
F H'14
G H'35
H H'45
I H'55
J H'65
K H'36
L H'46
M H'56
(d) Slave CPU, core interface
The slave CPU and core interface are the basic components for firmware execution. The slave
CPU starts operating immediately after a reset is cancelled. The core interface, however, can
be accessed after module stop mode is cancelled.
(e) USB function core
The USB function core is the main component of the USB interface. The USB bus interface
can be achieved if all components described in (a) to (d) operate correctly.
Rev. 3.00 Jan 25, 2006 page 622 of 872
REJ09B0286-0300
2 3
H'00 H'11
H'38 H'10
H'38 H'10
H'78 H'10
H'70 H'10
H'B8 H'20
H'20 H'10
H'20 H'10
H'20 H'10
H'20 H'10
H'20 H'10
H'20 H'10
H'20 H'10
4 5
H'00 H'00
H'00 H'01
H'00 H'02
H'00 H'01
H'00 H'02
H'00 H'01
H'00 H'03
H'00 H'04
H'00 H'05
H'00 H'06
H'00 H'03
H'00 H'04
H'00 H'05