Direct Transitions - Renesas H8S/2158 User Manual

Section 27 Power-Down Modes
resumes at the end of the bus cycle. In module stop mode, the internal states of modules other than
the MCIF, SCI, D/A converter, A/D converter, PWM, and PWMX are retained.
After the reset state is cancelled, all modules other than DTC are in module stop mode.
While an on-chip peripheral module is in module stop mode, read/write access to its registers is
disabled.
27.11

Direct Transitions

The CPU executes programs in three modes: high-speed, medium-speed, and subactive. When a
direct transition is made from high-speed mode to subactive mode, there is no interruption of
program execution. A direct transition is enabled by setting the DTON bit in LPWRCR to 1 and
then executing the SLEEP instruction. After a transition, direct transition exception handling
starts.
The CPU makes a transition to subactive mode when the SLEEP instruction is executed in high-
speed mode with the SSBY bit in SBYCR set to 1, the LSON bit and DTON bit in LPWRCR set
to 11, and the PSS bit in TSCR (WDT_1) set to 1.
To make a direct transition to high-speed mode after the time set in the STS2 to STS0 bits in
SBYCR has elapsed, execute the SLEEP instruction in subactive mode with the SSBY bit in
SBYCR set to 1, the LSON bit and DTON bit in LPWRCR set to 01, and the PSS bit in TSCR
(WDT_1) set to 1.
In high-speed mode or medium-speed mode, the system clock source (φ or φ24) can be switched
by using one of the following two methods according to the CKCHGE bit in SYSCR2. When the
CKCHGE bit is cleared to 0, after a transition to software standby mode or watch mode is made,
the system clock source is switched by a wakeup via an interrupt. When the CKCHGE bit is set to
1, a transition similar to active-subactive direct transition is made, and direct transition exception
handling is executed after a direct transition.
In high-speed mode or medium-speed mode, do not execute a SLEEP instruction when a setting
for making a direct transition to subactive mode and a setting for switching the system clock
source at a direct transition are made. When the system clock source is to be switched at a direct
transition, make sure the SLEEP instruction does not conflict with other interrupt sources.
Rev. 3.00 Jan 25, 2006 page 788 of 872
REJ09B0286-0300