Renesas H8S/2158 User Manual page 533

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Bit
Bit Name
Initial Value R/W
ICDRF
Description
Receive Data Register Full
[Setting condition]
When data is transferred from the shift register to the
receive buffer
(Data transfer from the shift register to the receive
buffer if there is receive data in the shift register when
ICDRF = 0 in receive mode)
(Data is not transferred from the shift register to the
receive buffer in transmit mode. To read data in the
shift register, read ICDR in receive mode.)
[Clearing conditions]
When receive data in ICDR (receive buffer) is read in
receive mode
If receive data is read from ICDR (receive buffer) in
receive mode when the shift register contains the next
receive data, ICDRF is cleared to 0. However, since
data is transferred from the shift register to the
receive buffer immediately, ICDRF is set to 1 again.
Internal state initialization
2
Section 17 I
C Bus Interface (IIC)
Rev. 3.00 Jan 25, 2006 page 479 of 872
REJ09B0286-0300

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