Renesas H8S/2158 User Manual page 381

Bit Bit Name Initial Value
1 OS1 0
0 OS0 0
Note: * Only 0 can be written, for flag clearing.
TCSR_Y
Bit Bit Name Initial Value
7 CMFB 0
6 CMFA 0
5 OVF 0
4 ICIE 1
R/W Description
R/W Output Select 1, 0
R/W These bits specify how the TMOX pin output level is to
be changed by compare-match A of TCORA_X and
TCNT_X.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
R/W Description
R/(W) * Compare-Match Flag B
[Setting condition]
•
When the values of TCNT_Y and TCORB_Y match
[Clearing condition]
•
Read CMFB when CMFB = 1, then write 0 in CMFB
R/(W) * Compare-Match Flag A
[Setting condition]
•
When the values of TCNT_Y and TCORA_Y match
[Clearing condition]
•
Read CMFA when CMFA = 1, then write 0 in CMFA
R/(W) * Timer Overflow Flag
[Setting condition]
•
When TCNT_Y overflows from H'FF to H'00
[Clearing condition]
•
Read OVF when OVF = 1, then write 0 in OVF
R/(W) * Input Capture Interrupt Enable
Enables or disables the ICF interrupt request (ICIX)
when the ICF bit in TCSR_X is set to 1.
0: ICF interrupt request (ICIX) is disabled
1: ICF interrupt request (ICIX) is enabled
Section 13 8-Bit Timer (TMR)
Rev. 3.00 Jan 25, 2006 page 327 of 872
REJ09B0286-0300