Figure 14.26 Retransfer Operation In Sci Transmit Mode; Figure 14.27 Tend Flag Generation Timing In Transmission Operation - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 14 Serial Communication Interface (SCI)
Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
TDRE
Transfer to TSR from TDR
TEND
FER/ERS

Figure 14.26 Retransfer Operation in SCI Transmit Mode

The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND flag
set timing is shown in figure 14.27.
I/O data
TXI
(TEND interrupt)
When GM = 0
When GM = 1
Legend:
Ds:
Start bit
D0 to D7:
Data bits
Dp:
Parity bit
DE:
Error signal
Note: etu: Elementary Time Unit (time for transfer of 1 bit)

Figure 14.27 TEND Flag Generation Timing in Transmission Operation

Rev. 6.00 Mar 15, 2006 page 370 of 570
REJ09B0211-0600
nth transfer frame
[6]
Ds
D0
D1
D2
Retransferred frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer to TSR from TDR
[7]
D3
D4
D5
D6
D7
12.5 etu
11.0 etu
Transfer
frame n+1
(DE)
Ds D0 D1 D2 D3 D4
Transfer to TSR
from TDR
[9]
[8]
Dp
DE
Guard
time

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