Renesas H8S/2158 User Manual page 51

Table 14.9 Examples of TCR, TCSR, TCORA, TCORB, OCRAR, OCRAF,
and TOCR Settings................................................................................................. 368
Table 14.10 HSYNCO Output Modes........................................................................................ 370
Table 14.11 VSYNCO Output Modes........................................................................................ 371
Section 15 Watchdog Timer (WDT)
Table 15.1 Pin Configuration ................................................................................................... 375
Table 15.2 WDT Interrupt Source............................................................................................ 382
Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
Table 16.1 Pin Configuration ................................................................................................... 391
Table 16.2 Relationships between N Setting in BRR and Bit Rate B ...................................... 405
Table 16.3 BRR Settings for Various Bit Rates (Asynchronous Mode) .................................. 406
Table 16.4 Maximum Bit Rate for Each Frequency (Asynchronous Mode) ............................ 409
Table 16.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode) .................. 409
Table 16.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) ...................... 410
Table 16.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode)...... 410
Table 16.8 BRR Settings for Various Bit Rates
(Smart Card Interface Mode, n = 0, s = 372).......................................................... 411
Table 16.9 Maximum Bit Rate for Each Frequency (Smart Card Interface Mode, S = 372) ... 411
Table 16.10 Serial Transfer Formats (Asynchronous Mode) ..................................................... 418
Table 16.11 SSR Status Flags and Receive Data Handling........................................................ 428
Table 16.12 IrCKS2 to IrCKS0 Bit Settings .............................................................................. 458
Table 16.13 SCI Interrupt Sources ............................................................................................. 460
Table 16.14 SCI Interrupt Sources ............................................................................................. 460
2
Section 17 I C Bus Interface (IIC)
Table 17.1 Pin Configuration ................................................................................................... 476
Table 17.2 Communication Format.......................................................................................... 481
2
Table 17.3 I C Transfer Rate.................................................................................................... 484
Table 17.4 Flags and Transfer States ....................................................................................... 490
Table 17.5 Restrictions on Accessing IIC Registers ................................................................ 511
Table 17.6 Operation Reservation Commands......................................................................... 513
Table 17.7 Operation When the Operation Reservation Command Is Completed ................... 514
Table 17.8 Examples of Operation Using DTC ....................................................................... 532
Table 17.9 Examples of Operation Reservation Adapter Operation Using DTC..................... 533
Table 17.10 IIC Interrupt Sources .............................................................................................. 540
2
Table 17.11 I C Bus Timing (SCL and SDA Outputs) .............................................................. 541
Table 17.12 Permissible SCL Rise Time (t
2
Table 17.13 I C Bus Timing (with Maximum Influence of t
) Values................................................................. 542
sr
/t ) ............................................. 543
Sr Sf
Rev. 3.00 Jan 25, 2006 page xlix of lii