Renesas H8S/2158 User Manual page 626

Section 18 Universal Serial Bus Interface (USB)
Bit Bit Name Initial Value R/W
7 — 0
6 EP5TS 0
5 EP4TS 0
Rev. 3.00 Jan 25, 2006 page 572 of 872
REJ09B0286-0300
Description
R Reserved
This bit is always read as 0 and cannot be modified.
R/(W) * Endpoint 5 Transfer Success Flag
Indicates that the endpoint 5 host output transfer has
been completed normally.
When host output transfer is completed normally while
the RAM-FIFO is full and data still remains in the receive
buffer, this bit is not set to 1 and the EP5UDTR bit in
UDTRFR is set to 1. For details, see section 18.3.20,
RFU/FIFO Read Request Flag Register (UDTRFR).
0: Indicates that the endpoint 5 is in a transfer wait state.
[Clearing condition]
•
0 is written to EP5TS after EP5TS = 1 has been
read.
1: Indicates that the endpoint 5 host output transfer
(OUT transaction) has been completed normally.
[Setting condition]
•
An ACK handshake has been achieved (ACK
transmission) after OUT token reception and data
transfer, and FIFO operation by the RFU has been
completed normally.
R/(W) * Endpoint 4 Transfer Success Flag
Indicates that the endpoint 4 host input transfer has been
completed normally.
0: Indicates that the endpoint 4 is in a transfer wait state.
[Clearing condition]
•
0 is written to EP4TS after EP4TS = 1 has been
read.
1: Indicates that the endpoint 4 host input transfer (IN
transaction) has been completed normally.
[Setting condition]
•
An ACK handshake has been achieved (ACK
transmission) after IN token reception and data
transfer, and FIFO operation by the RFU has been
completed normally.