Renesas H8S/2158 User Manual page 292

Section 9 I/O Ports
CLOE
P64DDR
Pin function
• P63/FTIB/CIN3/KIN3/VFBACKI
The function of port 6 pins is switched as shown below according to the P63DDR bit.
When the ICIBE bit in TIER of FRT is set to 1, this pin can be used as the FTIB input pin.
When the KBADE bit in KBCOMP of the A/D converter is set to 1 while the KBCH2 to
KBCH0 bits are set to B'011, this pin can be used as the CIN3 input pin. When the KMIM3 bit
in KMIMR6 of the interrupt controller is cleared to 0, this pin can be used as the KIN3 input
pin. To use this pin as the KIN3 input pin, clear the P63DDR bit to 0. When the SIMOD1 and
SIMOD0 bits (IVI signal) in TCONRI of the timer connection are cleared to B'00, this pin can
be used as the VFBACKI input pin.
P63DDR
Pin function
• P62/FTIA/CIN2/KIN2/VSYNCI
The function of port 6 pins is switched as shown below according to the P62DDR bit.
When the ICIAE bit in TIER of FRT is set to 1, this pin can be used as the FTIA input pin.
When the KBADE bit in KBCOMP of the A/D converter is set to 1 while the KBCH2 to
KBCH0 bits are set to B'010, this pin can be used as the CIN2 input pin. When the KMIM2 bit
in KMIMR6 of the interrupt controller is cleared to 0, this pin can be used as the KIN2 input
pin. To use this pin as the KIN2 input pin, clear the P62DDR bit to 0. When the SIMOD1 and
SIMOD0 bits (IVI signal) in TCONRI of the timer connection are set to B'11, this pin can be
used as the VSYNCI input pin.
P62DDR
Pin function
Rev. 3.00 Jan 25, 2006 page 238 of 872
REJ09B0286-0300
0
0
P64 input pin
FTIC input pin/CIN4 input pin/KIN4 input pin
0
P63 input pin
FTIB input pin/CIN3 input pin/KIN3 input pin/VFBACKI input pin
0
P62 input pin
FTIA input pin/CIN2 input pin/KIN2 input pin/VSYNCI input pin
0
1
P64 output pin
P63 output pin
P62 output pin
1
—
CLAMPO output pin
1
1