12.5.10 Mask Signal Generation Timing; Figure 12.15 Timing Of Input Capture Mask Signal Setting; Figure 12.16 Timing Of Input Capture Mask Signal Clearing - Renesas H8S/2158 User Manual

12.5.10 Mask Signal Generation Timing

When the ICRDMS bit in TOCR is set to 1 and the contents of OCRDM are other than H'0000, a
signal that masks the ICRD input capture signal is generated. The mask signal is set by the input
capture signal. The mask signal is cleared by the sum of the ICRD contents and twice the OCRDM
contents, and an FRC compare-match. Figure 12.15 shows the timing of setting the mask signal.
Figure 12.16 shows the timing of clearing the mask signal.
φ
Input capture
signal
Input capture
mask signal

Figure 12.15 Timing of Input Capture Mask Signal Setting

φ
FRC
ICRD + OCRDM × 2
Compare-match
signal
Input capture
mask signal

Figure 12.16 Timing of Input Capture Mask Signal Clearing

Section 12 16-Bit Free-Running Timer (FRT)
N
N
Rev. 3.00 Jan 25, 2006 page 307 of 872
N + 1
REJ09B0286-0300