Section 11 14-Bit Pwm Timer (Pwmx); Features; Figure 11.1 Pwm (D/A) Block Diagram - Renesas H8S/2158 User Manual

Section 11 14-Bit PWM Timer (PWMX)

This LSI has an on-chip 14-bit pulse-width modulator (PWM) timer with two output channels. It
can be connected to an external low-pass filter to operate as a 14-bit D/A converter.
11.1

Features

• Division of pulse into multiple base cycles to reduce ripple
• Four resolution settings
The resolution can be set equal to one, two, 64, or 128 system clock cycles.
• Two base cycle settings
The base cycle can be set equal to T × 64 or T × 256, where T is the resolution.
• Eight operating speeds
• Eight operation clocks (by combination of four resolution settings and two base cycle settings)
Figure 11.1 shows a block diagram of the PWM (D/A) module.
Select clock
PWX0
PWX1
Legend:
DACR : PWM D/A control register (6 bits)
DADRA : PWM D/A data register A (15 bits)
DADRB : PWM D/Adata register B (15 bits)
DACNT : PWM D/A counter (14 bits)
PWM1411A_000020020300
Internal clock
φ
φ/2, φ/64, φ/128
Clock
Base cycle compare match A
Fine-adjustment pulse addition
Base cycle compare match B
Fine-adjustment pulse addition
Control
logic
Base cycle overflow

Figure 11.1 PWM (D/A) Block Diagram

Section 11 14-Bit PWM Timer (PWMX)
Comparator DADRA
Comparator DADRB
DACNT
DACR
Rev. 3.00 Jan 25, 2006 page 273 of 872
Internal data bus
Bus interface
Module data bus
REJ09B0286-0300