Port A Input Data Register (Papin); Pin Functions - Renesas H8S/2158 User Manual

9.10.3

Port A Input Data Register (PAPIN)

PAPIN indicates the pin states.
Bit Bit Name
7 to 2 —
1 PA1PIN
0 PA0PIN
Note: * The initial values of bits 1 and 0 are determined according to the pin states of PA1 and
PA0.
9.10.4

Pin Functions

The relationship between the operating mode, register setting values, and pin functions are as
follows. In the tables, the symbol "—" stands for Don't care.
Extended Mode (Mode 2):
• PA1/A17/KIN9/SSE2I
The function of port A pins is switched as shown below according to the combination of the
SSE bit in SEMR of SCI_2, the C/A bit in SMR, the CKE1 bit in SCR, the CS256E and IOSE
bits in SYSCR, the ADFULLE bit in BCR2 of BSC, and the PA1DDR bit.
Address 13 in the following table is expressed by the following logical expression:
Address 13 = 1:ADFULLE
When the KMIM9 bit in KMIMRA of the interrupt controller is cleared to 0, this pin can be
used as the KIN9 input pin. To use this pin as the KIN9 input pin, clear the PA1DDR bit to 0.
SSE
C/A
CKE1
PA1DDR
Address 13
Pin function PA1 input pin
Note: Even if SSE = 0, PA1DDR = 1 and CPCSE = 1, pin PA1 can be used as an output pin only
when IOSE = 1.
Initial Value R/W
All 1 R
Undefined *
R
Undefined *
R
0
1
PA1 output pin
Description
Reserved
These bits are always read as 1.
When a PAPIN read is performed, the pin states
are always read.
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
CS256E
IOSE
0
—
—
1
A17 output pin
KIN9 input pin
Rev. 3.00 Jan 25, 2006 page 255 of 872
Section 9 I/O Ports
1
1
1
1 —
0 —
SSE2I
REJ09B0286-0300