Operations In Spi Mode; Operation Of Commands Without Data Transfer - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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19.6

Operations in SPI Mode

SPI mode is an operating mode in which the transfer clock is output from the MCCLK pin, and
command/response/data is input/output via the MCRxD pin and MCTxD pin.
In SPI mode, one of multiple MMCs is selected by the chip select (CS) pin. Therefore, card
selection using broadcast commands for MMC mode is not supported. In SPI mode, data response
to write data is supported.
19.6.1

Operation of Commands without Data Transfer

Commands without data transfer execute the desired data transfer using command arguments and
command responses. For a command that is related to time-consuming processing such as flash
memory write/erase, the MMC displays the data busy state.
Figures 19.17 and 19.18 show examples of the command sequence for commands without data
transfer. Figure 19.19 shows the operational flow for commands without data transfer.
• Settings needed to issue a command are made.
• The START bit in CMDSTRT is set to 1 to start command transmission. The CS signal goes
low (select). Command transmission complete can be confirmed by the command transmission
end interrupt (CMDI).
• A command response is received from the MMC. If the MMC does not return the command
response, the command response is detected by the command timeout error (CTERI).
• When the command sequence ends, the CS signal goes high (not select). The end of the
command sequence is detected by poling the BUSY flag in CSTR or by the command output
end interrupt (CRPI).
• The end of the data busy state is detected by poling the DTBUSY flag in CSTR or by the data
busy end interrupt (DBSYI).
Section 19 Multimedia Card Interface (MCIF)
Rev. 3.00 Jan 25, 2006 page 675 of 872
REJ09B0286-0300

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