Section 27 Power-Down Modes
• SUBMSTPBH
Bit
Bit Name
Initial Value R/W
1 *
7
SMSTPB15
1 *
6
SMSTPB14
1 *
5
SMSTPB13
1 *
4
SMSTPB12
1 *
3
SMSTPB11
1 *
2
SMSTPB10
1
SMSTPB9
1
0
SMSTPB8
1
Note:
* Do not clear this bit to 0.
• SUBMSTPBL
Bit
Bit Name
Initial Value R/W
1 *
7
SMSTPB7
6
SMSTPB6
1
1 *
5
SMSTPB5
1 *
4
SMSTPB4
1 *
3
SMSTPB3
1 *
2
SMSTPB2
1
SMSTPB1
1
1 *
0
SMSTPB0
Note:
* Do not clear this bit to 0.
27.2
Mode Transitions and LSI States
Figure 27.1 shows the enabled mode transition diagram. The mode transition from program
execution state to program halt state is performed by the SLEEP instruction. The mode transition
from program halt state to program execution state is performed by an interrupt. The STBY input
causes a mode transition from any state to hardware standby mode. The RES input causes a mode
transition from a state other than hardware standby mode to the reset state. Table 27.2 shows the
LSI internal states in each operating mode.
Rev. 3.00 Jan 25, 2006 page 778 of 872
REJ09B0286-0300
Corresponding Module
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Encryption operation circuit (GF)
R/W
Encryption operation circuit (DES)
Corresponding Module
R/W
R/W
Multimedia card interface (MCIF)
R/W
R/W
R/W
R/W
R/W
Universal serial bus interface (USB)
R/W