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Bit
Bit Name Initial Value R/W
2
CKS2
0
1
CKS1
0
0
CKS0
0
Note:
* Only 0 can be written, to clear the flag.
Description
R/W
Clock Select 2 to 0
R/W
Selects the clock source to be input to. The overflow
frequency for φ = 25 MHz is enclosed in parentheses.
R/W
000: φ/2 (frequency: 20.4 µs)
001: φ/64 (frequency: 655.3 µs)
010: φ/128 (frequency: 1.3 ms)
011: φ/512 (frequency: 5.2 ms)
100: φ/2048 (frequency: 20.9 ms)
101: φ/8192 (frequency: 83.8 ms)
110: φ/32768 (frequency: 335.5 ms)
111: φ/131072 (frequency: 1.34 s)
Section 15 Watchdog Timer (WDT)
Rev. 3.00 Jan 25, 2006 page 377 of 872
REJ09B0286-0300
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