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5.3.4 IRQ Sense
Control Registers
(ISCR16H, ISCR16L,
ISCRH, ISCRL)
6.3.1 Bus Control
Register (BCR)
8.2.15 Data Transfer
ID Read/Write Select
Register B (DTIDSRB)
9.9.2 Port 9 Data
Register (P9DR)
13.1 Features
Main Revisions in This Edition
Page
Revision (See Manual for Details)
—
All references to Hitachi, Hitachi, Ltd., Hitachi Semiconductors,
and other Hitachi brand names changed to Renesas
Technology Corp. Designation for categories changed from
"series" to "group"
Package
TQFP (TFP-100B) deleted
(Before) TFBGA (TBP-112) → (After) TFBGA (TBP-112A)
79
Description added
The ISCR registers ... or pins ExIRQ15 to ExIRQ2. Switching
between pins IRQ15 to IRQ2 and pins ExIRQ15 to ExIRQ2 is
performed by means of IRQ sense port select register 16
(ISSR16) and the IRQ sense port select register (ISSR).
107
Bit table amended
Bit
Bit Name
1
IOS1
0
IOS0
179
Bit table amended
0: RAM → Peripheral modules (write)
1: Peripheral modules (read) → RAM
251
Table amended
(Before) R/W → (After) R
315
Description amended
• Cascading of two channels
— Cascading of TMR_0 and TMR_1
... TMR_1 can be used to count TMR_0 compare-match
occurrences (compare-match count mode).
Multiple interrupt sources for each channel ...
•
Initial Value
R/W
Description
1
R/W
IOS Select 1, 0
Select the address range where the IOS signal is
1
R/W
output. For details, refer to table 6.8.
Rev. 3.00 Jan 25, 2006 page ix of lii
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