Ds
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
TDRE
Transfer to TSR from TDR
TEND
FER/ERS
Figure 14.26 Retransfer Operation in SCI Transmit Mode
The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND
flag generation timing is shown in figure 14.27.
I/O data
TXI
(TEND interrupt)
When GM = 0
When GM = 1
Legend
: Start bit
Ds
: Data bits
D0 to D7
: Parity bit
Dp
: Error signal
DE
Note: etu: Elementary Time Unit (time for transfer of 1 bit)
Figure 14.27 TEND Flag Generation Timing in Transmission Operation
Rev. 2.00, 05/03, page 572 of 820
nth transfer frame
[6]
Ds
D0
D1
D2
Retransferred frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transfer to TSR from TDR
[7]
D3
D4
D5
D6
D7
12.5etu
11.0etu
Transfer
frame n+1
(DE)
Ds D0 D1 D2 D3 D4
Transfer to TSR
from TDR
[9]
[8]
Dp
DE
Guard
time