Renesas H8S/2158 User Manual page 558

16-bit single-chip microcomputer h8s family/h8s/2100 series
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2
Section 17 I
C Bus Interface (IIC)
Bit
Bit Name
Initial Value
2
TDRE
0
Rev. 3.00 Jan 25, 2006 page 504 of 872
REJ09B0286-0300
R/W
Description
R
Transmit Data Register Empty
0: Transmit buffer (ICDRT) contains transmit data
1: Transmit buffer (ICDRT) contains no transmit data;
write to ICDRT is possible
[Setting conditions]
When start condition is detected (when ICDRX is not
written to before the start condition is detected) *
When transfer of first frame (address + R/W) ends
(rise of 9th clock) *
When transmission of second or subsequent frames
starts (fall of 1st clock) (except for when transferring
the last byte in DTC transfer) *
[Clearing conditions]
When ICDRX is written to *
When ACKB = 1 is received
When stop condition is detected
This bit is enabled during transmission by the IIC
operation reservation adapter.
For transmission/reception with the conventional method,
see the description of the ICDRE and ICDRF flags in
ICDR.
2
2
2
2

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