Table 6.3 Bit Settings And Bus Specifications Of Basic Bus Interface - Renesas H8S/2158 User Manual

Table 6.3 Bit Settings and Bus Specifications of Basic Bus Interface
BRSTRM CS256E CPCSE
0 0 0
1
1 0
1
1 0 0
1
1 0
1
Legend:
: Don't care
Note: * In the burst ROM interface, the bus width is specified by the ABW bit in WSCR, the
number of full access states (wait can be inserted) is specified by the AST bit in WSCR,
and the number of access cycles in burst access is specified regardless of the AST bit
setting.
Basic Expansion
CFE Area
— Basic expansion area
ABW, AST, WMS1,
WMS0, WC1, WC0
0
1
—
0
1
Burst ROM interface *
—
ABW, AST, WMS0,
WC1, WC0, BRSTS1,
0
BRSTS0
1
—
0
1
Section 6 Bus Controller
Areas
256-kbyte
Expansion Area
Used as basic
expansion area
ABW256, AST256,
WMS10, WC11,
WC10
Used as burst
ROM interface
ABW256, AST256,
WMS10, WC11,
WC10
Rev. 3.00 Jan 25, 2006 page 117 of 872
CP Expansion Area
(Basic Mode) and
CF Expansion Area
(Memory Card
Mode)
Used as basic
expansion area
ABWCP, ASTCP,
WMS21, WMS20,
WC21, WC20
Memory card mode
WMS21, WMS20,
WC22, WC21, WC20
Same as when
CS256E = 0
Used as burst ROM
interface
ABWCP, ASTCP,
WMS21, WMS20,
WC21, WC20
Memory card mode
WMS21, WMS20,
WC22, WC21, WC20
Same as when
CS256E = 0
REJ09B0286-0300