Renesas H8S/2158 User Manual page 407

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Bit
Bit Name
3
HOINV
2
VOINV
1
CLOINV
0
CBOINV
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Output Synchronization Signal Inversion
These bits select inversion of the output phase of
the horizontal synchronization signal (HSYNCO), the
vertical synchronization signal (VSYNCO), the
clamp waveform (CLAMPO), and the blanking
waveform (CBLANK).
HOINV:
0: The IHO signal is used directly as the HSYNCO
output
1: The IHO signal is inverted before use as the
HSYNCO output
VOINV:
0: The IVO signal is used directly as the VSYNCO
output
1: The IVO signal is inverted before use as the
VSYNCO output
CLOINV:
0: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
used directly as the CLAMPO output
1: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
inverted before use as the CLAMPO output
CBOINV:
0: The CBLANK signal is used directly as the
CBLANK output
1: The CBLANK signal is inverted before use as the
CBLANK output
Rev. 3.00 Jan 25, 2006 page 353 of 872
Section 14 Timer Connection
REJ09B0286-0300

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