10.3.5
Peripheral Clock Select Register (PCSR)
PCSR selects the PWM input clock.
Bit
Bit Name
Initial Value
7, 6 —
All 0
5
PWCKXB
0
4
PWCKXA
0
3
—
0
2
PWCKB
0
1
PWCKA
0
0
—
0
R/W
Description
R/(W) Reserved
The initial value should not be changed.
R/W
See section 11.3.4, Peripheral Clock Select Register
R/W
(PCSR).
R
Reserved
This bit is always read as 0 and cannot be modified.
R/W
PWM Clock Select B, A
R/W
Together with bits PWCKE and PWCKS in PWSL,
these bits select the internal clock input to the clock
counter. For details, see table 10.2.
R/(W) Reserved
The initial value should not be changed.
Section 10 8-Bit PWM Timer (PWM)
Rev. 3.00 Jan 25, 2006 page 269 of 872
REJ09B0286-0300