Renesas H8S/2158 User Manual page 559

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Bit
Bit Name
Initial Value
1
SDRF
0
R/W
Description
R
Shift Data Register Full
0: Shift register (ICDRS) contains no receive data
remaining to be read or data remaining to be
transmitted
1: Shift register (ICDRS) contains receive data remaining
to be read or data remaining to be transmitted
[Setting condition in transmit mode]
When ICDRX is written to, or when data transmission
ends (rise of 9th clock) with the next transmit data set
in ICDRT (TDRE = 0) *
[Clearing conditions in transmit mode]
When data transmission ends (rise of 9th clock) with
the next transmit data not set in ICDRT (TDRE = 1) *
When stop condition is detected
When receive mode is entered
Arbitration lost
[Setting condition in receive mode]
When data reception ends (fall of 8th clock) with
RDRF = 1 *
[Clearing conditions in receive mode]
When ICDRX is read from
When start condition is detected
When transmit mode is entered
This bit is enabled during transmission or reception by
the IIC operation reservation adapter.
2
Section 17 I
2
3
Rev. 3.00 Jan 25, 2006 page 505 of 872
C Bus Interface (IIC)
2
REJ09B0286-0300

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