Pin Mode Control Register (Iomcr) - Renesas H8S/2158 User Manual

19.3.15 Pin Mode Control Register (IOMCR)

IOMCR controls chip select pin operation in SPI mode and input/output direction output pin
operation in MMC mode.
Bit Bit Name
7 SPCNUM
6 CHIPSA
5 to —
2
1 DIRME
Initial Value R/W
0 R/W
0 R/W
All 0 R
0 R/W
Section 19 Multimedia Card Interface (MCIF)
Description
Number of SPI Mode MMCs
Specifies whether one or two MMCs are to be
operated in SPI mode.
0: One MMC is connected to the MCCSA pin.
Disables MCCSB pin output.
1: Maximum of two MMCs are connected to the
MCCSA and MCCSB pins.
MMC Selection A/B
Specifies selection of two MMCs while
SPCNUM = 1.
0: Outputs CS signal from the MCCSA pin, and
sets the MCCSB pin high (no selection).
1: Sets the MCCSA pin high (no selection), and
outputs CS signal from the MCCSB pin.
Reserved
These bits are always read as 0 and cannot be
modified.
Signal Direction Output Enable
Enables/disables the outputs of the
MCCMDDIR and MCDATDIR pins that output
the input/output direction of the MCCMD and
MCDAT pins, in MMC mode.
0: Disables MCCMDDIR pin and MCDATDIR
pin outputs.
1: Enables MCCMDDIR pin and MCDATDIR
pin outputs.
Rev. 3.00 Jan 25, 2006 page 653 of 872
REJ09B0286-0300