External Trigger Input Timing; Interrupt Source; Figure 22.3 External Trigger Input Timing; Table 22.5 A/D Converter Interrupt Source - Renesas H8S/2158 User Manual

Section 22 A/D Converter
22.5.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the ADST bit has been set to 1 by software. Figure 22.3 shows the
timing.
φ
ADTRG
Internal trigger
signal
ADST
22.6

Interrupt Source

The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 enables ADI interrupt requests while the ADF bit in ADCSR is set to 1
after A/D conversion ends.
The ADI interrupt can be used as a DTC activation interrupt source.

Table 22.5 A/D Converter Interrupt Source

Name Interrupt Source
ADI A/D conversion end
Rev. 3.00 Jan 25, 2006 page 708 of 872
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Figure 22.3 External Trigger Input Timing

A/D conversion
Interrupt Flag
ADF
DTC Activation
Possible