Table 18.5 Packets Included In Each Transaction - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Table 18.5 Packets Included in Each Transaction

Stage
Setup stage
Control write
Data stage
transfer
Status stage IN token
Control read
Data stage
transfer
Status stage OUT token
No data stage Status stage IN token
Notes: 1. This phase exists only when a data packet has been transferred in the data phase.
2. If the FIFO is empty after all data items in the FIFO have been transferred, the EPTE bit
is cleared to 0. If an IN transaction is initiated at this time, a NAK handshake is
returned. To transfer a 0-byte data packet, set the EPTE bit to 1 while the FIFO is
empty.
Figures 18.2 to 18.5 show the USB function core and LSI firmware operations when the USB
function core receives a SETUP token (SETUP transaction).
Section 18 Universal Serial Bus Interface (USB)
Token Phase Data Phase
SETUP token
OUT data packet (8 bytes)
packet
(host to slave)
OUT token
OUT data packet
packet
(host to slave)
IN data packet (0 bytes) *
packet
(slave to host)
NAK/STALL handshake
packet
(slave to host)
IN token
IN data packet
packet
(slave to host)
NAK/STALL handshake
packet
(slave to host)
OUT data packet
packet
(host to slave)
IN data packet (0 bytes) *
packet
(slave to host)
NAK/STALL handshake
packet
(slave to host)
Handshake Phase *
ACK handshake
packet (slave to host)
ACK/NAK/STALL
handshake packet
(slave to host)
2
ACK handshake
packet (host to slave)
ACK handshake
packet (host to slave)
ACK/NAK/STALL
handshake packet
(slave to host)
2
ACK handshake
packet (host to slave)
Rev. 3.00 Jan 25, 2006 page 605 of 872
1
REJ09B0286-0300

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