Data Format - Renesas F-ZTAT H8 Series Hardware Manual

14.3.3

Data Format

Figure 14.3 shows the data format of the smart card interface. In receive mode, parity is checked
once per frame. If a parity error is detected, an error signal is returned to the transmitting device to
request retransmission. In transmit mode, the error signal is sampled and the same data is
retransmitted if the error signal is low.
No parity error
Ds
Parity error
Ds
Ds: Start bit
D0 to D7: Data bits
Dp: Parity bit
DE: Error signal
The operating sequence is as follows.
1. When not in use, the data line is in the high-impedance state, and is pulled up to the high level
through a resistor.
2. To start transmitting a frame of data, the transmitting device transmits a low start bit (Ds),
followed by eight data bits (D0 to D7) and a parity bit (Dp).
3. Next, in the smart card interface, the transmitting device returns the data line to the high-
impedance state. The data line is pulled up to the high level through a resistor.
4. The receiving device performs a parity check. If there is no parity error, the receiving device
waits to receive the next data. If a parity error is present, the receiving device outputs a low
error signal (DE) to request retransmission of the data. After outputting the error signal for a
designated interval, the receiving device returns the signal line to the high-impedance state.
The signal line is pulled back up to the high level through the pull-up resistor.
5. If the transmitting device does not receive an error signal, it proceeds to transmit the next data.
If it receives an error signal, it returns to step 2 and transmits the same data again.
D0 D1 D2 D3
Output from transmitting device
D0 D1 D2 D3
Output from transmitting device
Figure 14.3 Smart Card Interface Data Format
Section 14 Smart Card Interface
D4 D5 D6 D7
D4 D5 D6 D7
Rev. 7.00 Sep 21, 2005 page 519 of 878
Dp
Dp DE
Output from
receiving device
REJ09B0259-0700