Switching Of Internal Clocks And Tcnt Operation; Table 11.4 Timer Output Priorities; Table 11.5 Switching Of Internal Clocks And Tcnt Operation - Renesas H8S/2437 Hardware Manual

Table 11.4 Timer Output Priorities

Output Setting
Toggle output
1 output
0 output
No change
11.9.5

Switching of Internal Clocks and TCNT Operation

TCNT may be incremented erroneously when the internal clock is switched over. Table 11.5
shows the relationship between the timing at which the internal clock is switched (by writing to
the CKS1 and CKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the falling edge of the internal clock
pulse is detected. If clock switching causes a change from high to low level, as shown in no. 3 in
table 11.5, a TCNT clock pulse is generated on the assumption that the switchover is a falling edge,
and TCNT is incremented.
Erroneous incrementation can also happen when switching between internal and external clocks.

Table 11.5 Switching of Internal Clocks and TCNT Operation

Timing of Switchover
by Means of CKS1
No. and CKS0 Bits
1 Clock switching from low
1
to low level*
Priority
High
Low
TCNT Clock Operation
Clock before
switchover
Clock after
switchover
TCNT
clock
TCNT N N + 1
CKS bit rewrite
Rev. 1.00, 09/03, page 295 of 704