Slave Address Register (Sar) - Renesas HD6417641 Hardware Manual

2
Section 16 I C Bus Interface 2 (IIC2)
Bit Bit Name
1 AAS
0 ADZ
16.3.6

Slave Address Register (SAR)

SAR is an 8-bit readable/writable register that selects the communications format and sets the
slave address. In slave mode with the I
upper seven bits of the first frame received after a start condition, this module operates as the slave
device. SAR is initialized to H'00 by a power-on reset.
Bit Bit Name
7 to 1 SVA6 to SVA0 All 0
0 FS
Rev. 4.00 Sep. 14, 2005 Page 486 of 982
REJ09B0023-0400
Initial
Value R/W Description
0 R/W Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first
frame following a start condition matches bits SVA6 to
SVA0 in SAR.
[Setting conditions]
•
•
[Clearing condition]
•
0 R/W General Call Address Recognition Flag
This bit is valid in I
[Setting condition]
•
[Clearing condition]
•
2
C bus format, if the upper seven bits of SAR match the
Initial
Value R/W Description
R/W Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I
0 R/W Format Select
2
0: I
1: Clocked synchronous serial format is selected
When the slave address is detected in slave receive
mode
When the general call address is detected in slave
receive mode.
When 0 is written in AAS after reading AAS=1
2
C bus format slave receive mode.
When the general call address is detected in slave
receive mode
When 0 is written in ADZ after reading ADZ=1
2
C bus.
C bus format is selected