Slave Address Register (Sar) - Renesas H8/36912 Series User Manual

Bit Bit Name
1 AAS
0 ADZ
15.3.6

Slave Address Register (SAR)

SAR selects the communication format and sets the slave address. When the chip is in slave mode
2
with the I C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame
received after a start condition, the chip operates as the slave device.
Bit Bit Name Initial Value R/W Description
7 to 1 SVA6 to
SVA0
0 FS
Rev. 1.00, 11/03, page 236 of 376
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Initial Value R/W Description
0 R/W Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first frame
following a start condition matches bits SVA6 to SVA0 in
SAR.
[Setting conditions]
•
•
[Clearing condition]
•
0 R/W General Call Address Recognition Flag
This bit is valid in I
[Setting condition]
•
[Clearing condition]
•
All 0 R/W Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I
0 R/W Format Select
0: I
1: Clocked synchronous serial format is selected.
When the slave address is detected in slave receive
mode
When the general call address is detected in slave
receive mode.
When 0 is written in AAS after reading AAS=1
2
C bus format slave receive mode.
When the general call address is detected in slave
receive mode
When 0 is written in ADZ after reading ADZ=1
2
C bus.
2
C bus format is selected.