Slave Address Register (Sar) - Renesas H8 Series Hardware Manual

2
Section 15 I C Bus Interface 2 (IIC2)
Bit Bit Name Initial Value R/W Description
1 AAS 0
0 ADZ 0
15.3.6

Slave Address Register (SAR)

SAR selects the communication format and sets the slave address. When the chip is in slave mode
2
with the I C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame
received after a start condition, the chip operates as the slave device.
Bit Bit Name Initial Value R/W Description
7 to 1 SVA6 to All 0
SVA0
0 FS 0
Rev. 3.00 Sep. 14, 2006 Page 252 of 408
REJ09B0105-0300
R/W Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first frame
following a start condition matches bits SVA6 to SVA0 in
SAR.
[Setting conditions]
•
When the slave address is detected in slave receive
mode
•
When the general call address is detected in slave
receive mode.
[Clearing condition]
•
When 0 is written in AAS after reading AAS=1
R/W General Call Address Recognition Flag
This bit is valid in I
[Setting condition]
•
When the general call address is detected in slave
receive mode
[Clearing condition]
•
When 0 is written in ADZ after reading ADZ=1
R/W Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I
R/W Format Select
2
0: I C bus format is selected.
1: Clocked synchronous serial format is selected.
2
C bus format slave receive mode.
2
C bus.